Micrel KSZ8895 Specifications download pdf (Page 12)

Micrel, Inc.

KSZ8895MQ/RQ/FMQ

List of Tables

Table 1. MDI/MDI-X Pin Definitions ............................................................................................................................. 28

Table 2. Internal Function Block Status ....................................................................................................................... 31

Table 3. Port 5 PHY P5-MII/RMII Signals ..................................................................................................................... 38

Table 4. Switch MAC5 MII Signals ................................................................................................................................ 39

Table 5. Port 5 MAC5 SW5-RMII Connection ............................................................................................................... 41

Table 6. SNI Signals..................................................................................................................................................... 41

Table 7. Tail Tag Rules ................................................................................................................................................ 45

Table 8. FID+DA Look-Up in the VLAN Mode ............................................................................................................. 47

Table 9. FID+SA Look-Up in the VLAN Mode .............................................................................................................. 47

Table 10. SPI Connections .......................................................................................................................................... 50

Table 11. MII Management Interface Frame Format ................................................................................................... 52

Table 12. Serial Management Interface (SMI) Frame Format ..................................................................................... 52

Table 13. 100BT Rate Selection for the Rate limit ........................................................................................................ 90

Table 14. 10BT Rate Selection for the Rate Limit ......................................................................................................... 90

Table 15. Static MAC Address Table ............................................................................................................................ 92

Table 16. VLAN Table ................................................................................................................................................... 94

Table 17. VLAN ID and Indirect Registers .................................................................................................................... 95

Table 18. Dynamic MAC Address Table ....................................................................................................................... 96

Table 19. Port1 MIB Counter Indirect Memory Offerts .................................................................................................. 97

Table 20. Format of “Per Port” MIB Counter ................................................................................................................. 98

Table 21. All Port Dropped Packet MIB Counters ......................................................................................................... 98

Table 22. Format of “All Dropped Packet” MIB Counter ............................................................................................... 98

Table 23. EEPROM Timing Parameters ..................................................................................................................... 106

Table 24. SNI Timing Parameters ............................................................................................................................... 107

Table 25. MAC Mode MII Timing Parameters ............................................................................................................. 108

Table 26. PHY Mode MII Timing Parameters ............................................................................................................. 109

Table 27. RMII Timing Parameters ............................................................................................................................. 110

Table 28. SPI Input Timing Parameters ...................................................................................................................... 111

Table 29. SPI Output Timing Parameters ................................................................................................................... 112

Table 30. Auto-Negotiation Timing Parameters .......................................................................................................... 113

Table 31. MDC/MDIO Typical Timing Parameters ...................................................................................................... 114

Table 32. Reset Timing Parameters ........................................................................................................................... 115

Table 33. Transformer Selection Criteria .................................................................................................................... 117

Table 34. Qualified Magnetic Vendors ........................................................................................................................ 117

Table 35. Typical Reference Crystal Characteristics .................................................................................................. 117

March 12, 2014

Revision 1.7

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